LDPC, Bosonic, Cat, GKP, and Topological Approaches

Define the baseline contract#

Fix workload, logical operations, physical error model, connectivity, cycle duration, and surface-code accounting before comparison.

The surface code from Chapter 49 asks for a two-dimensional grid of qubits with nearest-neighbor checks — an assumption most hardware can almost meet. The families in this chapter each relax one line of that bill while raising another:

GKP encodes quantum information in oscillator phase space to correct small displacement errors under a specific idealized construction. [gkp-2001]

Work the comparison from the failure budget outward#

Begin with a memory experiment, because it exposes the bookkeeping without pretending that memory is a computer. Declare an encoded state, a storage interval $T$, allowed logical failure $\varepsilon_{\mathrm{mem}}$, and the operations included in a correction cycle. A surface-code row counts data and syndrome qubits, repeated stabilizer rounds, decoder work, and boundary geometry. A qLDPC row must count the hardware used to realize its higher-weight or nonlocal checks, not only the code's favorable ratio of physical to logical qubits. A bosonic row counts modes, nonlinear ancillas, pumps, readout chains, reset operations, and any outer code. The unit “physical qubits per logical qubit” is therefore not automatically common: one row may call an oscillator a physical qubit while another counts every coupled two-level element. Normalize the inventory before comparing it.

Next convert the workload target into a per-cycle budget. If a run contains $N$ correction opportunities and failures are sufficiently rare and approximately independent, the first-order requirement is $p_L \lesssim \varepsilon_{\mathrm{mem}}/N$. That inequality is an allocation, not a law of nature. Correlated bursts, leakage lasting across rounds, and decoder backlogs violate the approximation. A serious table therefore has separate columns for the fitted logical failure per round, the correlation model, the number of rounds, and the resulting run-level bound. This is the point at which a visually smaller code can lose: it may require slower checks, create more correlation, or consume a larger fraction of the total latency budget.

Comparison audit: Before approving the matrix, have an independent analyst reconstruct every denominator from the component list. Check whether a mode contains its ancillary nonlinear element, whether a qLDPC check contains routing and measurement ancillas, whether the surface baseline contains boundaries and factories relevant to the workload, and whether decoder compute is inside the system boundary. Recompute run failure from per-cycle quantities and flag any correlation assumption. Then remove the family names and ask whether the recommendation still follows from topology, channel, timing, and evidence. If swapping labels leaves the prose unchanged, the analysis is generic. If the result changes because a required primitive is unmeasured, the missing evidence—not confidence in a family—is the controlling conclusion.

qLDPC moves cost into nonlocal checks#

Explain rate/distance promise and expose routing, measurement scheduling, and decoder consequences without unsupported current numbers.

The factor physical_per_logical is where the approaches fight. Then grade the claim with the same discipline you would bring to any milestone:

Bosonic qubits exploit oscillator degrees of freedom and introduce distinct control, loss, leakage, and measurement assumptions. [bosonic-review]

qLDPC: rate is valuable only when the checks can be serviced#

Quantum low-density parity-check codes seek sparse checks and asymptotically favorable encoding rate or distance. Those are code properties. The machine still has to measure each check repeatedly and deliver the syndrome to a decoder. If a check touches qubits that are distant in the device graph, implementation choices include moving quantum information, distributing entanglement, adding couplers, or embedding the interaction in a modular network. Each choice adds locations that can fail. Count check weight, interaction range, maximum simultaneous checks, ancilla preparation, routing depth, and the number of time steps in one syndrome round. “Constant rate” does not imply constant-time correction on a planar nearest-neighbor processor.

Decoder complexity is similarly part of the architecture. A code may have an attractive threshold under a particular noise ensemble and decoder while a hardware control system supplies a different ensemble or cannot finish decoding before feedback is required. Store the decoder version, latency distribution, throughput, memory footprint, and whether decisions can be deferred. Compare the entire service rate with the syndrome arrival rate, as Chapter 51 does. A discriminating qLDPC experiment requires more than a larger encoded block: repeated correction with the intended check implementation, a declared decoder, and a logical failure curve that improves as the relevant code parameter grows.

Oscillators turn small displacements into syndromes#

Group bosonic and GKP mechanisms around phase-space redundancy, state preparation, loss, and analog measurement precision.

The score does not compute itself. It forces evidence and risk into one table, where a low-overhead promise with no demonstrated checks loses to a boring approach with working hardware.

Fault-tolerant approaches must be compared through operations, overhead, decoding, and error models rather than code names alone. [fault-tolerant-roads] [nielsen-chuang]

GKP and other oscillator encodings: analog information is a resource#

The ideal GKP construction places a lattice of peaks in phase space so that small displacement errors can be inferred modulo the lattice spacing [gkp-2001]. Finite-energy states replace infinitely sharp peaks, so preparation quality and analog syndrome precision enter the logical channel. A comparison must record squeezing or an equivalent state-quality measure, photon number, loss rate, measurement resolution, and how analog outcomes are passed to an outer decoder. Throwing away the analog residual and retaining only a hard bit can discard information that the decoding claim assumes.

Loss also acts differently across encodings. In an oscillator, a single physical mode spans many Fock levels; photon loss, dephasing, Kerr distortion, thermal excitation, and leakage from the intended code space do not collapse into one interchangeable “gate error.” The useful question is which errors the encoding makes detectable or biased after the complete operation set. A memory lifetime measured under continuous stabilization cannot be inserted unchanged into a controlled gate, readout, or reset budget. The registered bosonic review is useful for the mechanism and taxonomy, while a quantitative row needs a primary experiment matching the claimed operation [bosonic-review].

Cat encodings reshape the channel#

Show how bias can reduce outer-code cost only if preparation, gates, and readout preserve it.

A memo compares two approaches for the same target workload. Approach A promises tenfold lower overhead but needs long-range parity checks the chip cannot route. Approach B maps cleanly onto the existing two-dimensional layout but consumes three times more physical qubits.

Surface codes provide the declared local-check baseline for this chapter, under their own threshold assumptions. [surface-codes-2012]

Cat codes: preserve the bias through the operations that matter#

A stabilized cat manifold can make transitions between well-separated coherent states much rarer than phase-like errors. Call the resulting ratio a bias only after defining numerator, denominator, operation, and duration. An idle bias, entangling-gate bias, measurement bias, and reset bias are four measurements, not one platform attribute. When an outer repetition-style code is proposed to exploit the asymmetry, propagate all four channels through its cycle. A spectacular idle ratio is irrelevant if the entangling operation converts the dominant phase channel into bit flips or if leakage defeats the decoder's model.

Resource accounting for a cat architecture must also state whether a “mode” includes the nonlinear element and ancillary mode used for stabilization and readout. Pumps occupy bandwidth and introduce crosstalk; repeated parity measurements occupy time; engineered dissipation requires a reservoir whose behavior can drift. The matched baseline should achieve the same logical memory or operation target and include its own ancillas and controls. Only then can a claim of fewer physical components be distinguished from a change in what was counted.

Intrinsic topology raises the evidence burden#

Separate theoretical protection, material signature, qubit definition, operation, and architecture.

Only after that table exists does the memo discuss preference. A lower-overhead claim means nothing until someone shows the checks, states, gates, measurements, and decoders it quietly assumes.

Topological-device roadmaps require staged evidence from physical signatures through controlled qubit operations. [majorana-evidence-review]

Intrinsic topology: separate protection in the Hamiltonian from protected computation#

Topological quantum computation begins with a theoretical promise: information encoded nonlocally can be insensitive to sufficiently local perturbations, and braiding or measurement sequences can implement operations [majorana-evidence-review]. An experiment showing a transport feature consistent with a candidate excitation sits far below that architectural promise. The evidence ladder must pass through reproducible material and device signatures, exclusion of ordinary alternatives, controlled parity or state initialization, coherent manipulation, readout, and an operation whose error behavior supports the proposed protection mechanism.

Even a convincing topological qubit would not eliminate active engineering. Initialization, measurement, quasiparticle poisoning, finite-temperature excitations, calibration, classical control, and operations outside a natively protected gate set remain in the budget. Record which operations are topologically protected, which are merely conventional, and how universality is completed. A proposal that quotes a protected braid error while omitting state preparation and nonprotected operations is not an end-to-end comparison.

A comparison table with explicit blanks#

Record known mechanism, required primitive, dominant residual error, topology, timing, decoder, and missing registered evidence.

Stable physics and last quarter's company progress belong in different evidence columns. The theory of a cat qubit does not expire; the evidence that one team's cat qubit beats another's changes constantly. Keep the two separate in the memo, and re-verify the dated column before acting on it.

The current registered source set does not contain a qLDPC primary reference, so the commissioned draft must add one before publishing quantitative qLDPC claims. [fault-tolerant-roads]

A decision matrix should preserve incomparability#

Populate each row with four layers. The code layer states distance, rate, checks, and decoder assumptions. The device layer states noise, connectivity, timing, and measurement primitives. The control layer states scheduling, ancillas, feedback, and calibration. The evidence layer states whether each value is theoretical, simulated, component-level, encoded-memory, or operation-level. Blanks are meaningful. If no registered experiment supports the qLDPC check schedule on the declared graph, leave the achieved cycle time blank; do not borrow a surface-code cycle time. If a bosonic experiment reports memory break-even but not a two-mode gate, leave the gate row blank.

Then make the recommendation conditional. For a memory workload on hardware with high-quality oscillators and precise analog readout, an oscillator code may deserve the next experiment. For a modular processor with reliable nonlocal parity resources, a qLDPC architecture may justify a system prototype. For a planar device with local gates and a mature decoder path, the surface code remains the better-specified baseline even when its qubit count looks larger. For intrinsic topology, the next investment may still be a discriminating materials or parity experiment rather than a computer architecture. The output is not a universal champion; it is a short list of assumptions whose measurement would change the engineering decision.

Choose a research question, not a champion#

End with the next discriminating experiment for each family under the fixed contract.

For an engineer, these encodings are alternative architectures, and they deserve an architecture review rather than a brand comparison:

GKP encodes quantum information in oscillator phase space to correct small displacement errors under a specific idealized construction. [gkp-2001]

A matched review example#

Assume the requested service is a logical memory for $10^6$ correction cycles with total failure below $10^{-3}$. The planning allocation is therefore roughly $10^{-9}$ logical failure per cycle before correlation margin. The surface-code candidate supplies a distance series under a circuit-level Pauli model and a local-check schedule. The oscillator candidate supplies a measured memory channel but no entangling operation. The qLDPC candidate supplies simulation under the same Pauli model but assumes direct measurement of nonlocal checks. Those are not three comparable overhead numbers. Only the surface and qLDPC code models share a channel, and only the surface candidate supplies a schedule on the declared planar hardware.

The review should preserve partial conclusions. The qLDPC simulation may justify studying a nonlocal-check interconnect because its rate is attractive if those checks can be serviced. The oscillator memory may justify a complete-cycle experiment because its measured channel is promising. Neither supports a lower system footprint today. Fill a scenario column in which missing primitives are assigned explicit hypothetical parameters, then run a sensitivity sweep. Do not merge that scenario with the evidence column. A hypothetical crossover tells the team what performance a new primitive must reach; it does not say the primitive has reached it.

Finally, price the next experiment. For qLDPC, construct and repeatedly measure a small set of representative nonlocal checks on the intended connectivity, including ancillas, routing, and decoder timing. For the oscillator, execute preparation, repeated correction, one workload-relevant gate, and readout while tracking loss, leakage, and analog syndrome information. For the surface baseline, measure the same run duration and target operation under current controls. Predetermine the acceptance condition: the alternative must meet the run-level failure allocation and improve a common system resource without exceeding timing or control limits. That result would move a cell from hypothetical to observed and could legitimately change the recommendation.

Use sensitivity surfaces, not a league table#

The comparison becomes decision-ready only after uncertain inputs are allowed to move. Sweep physical loss, check error, decoder latency, oscillator lifetime, coupling degree, and target logical failure over ranges supported by the declared evidence. For each point, recompute total devices, correction-cycle seconds, classical throughput, and run-level failure. A boundary where the preferred construction changes is more informative than a single winning row: it identifies the measurement that could reverse the engineering choice. Preserve infeasible cells instead of dropping them, because “no design closes the budget” is a valid result.

Break-even also needs a named baseline. A memory encoding may outperform one bare component over a storage interval while losing once preparation, recovery, and readout enter the denominator. A qLDPC layout may reduce asymptotic qubit overhead while demanding checks the chosen interconnect cannot schedule. A bosonic mode may suppress one channel while an entangling operation restores a nearly symmetric error. The worksheet should report those reversals as properties of workload and architecture, not as defects hidden by a composite score.